Code to Chip: Build & Accelerate with FPGAs

Name: Code to Chip: Build & Accelerate with FPGAs
Start: 2026-10-14T04:45:00.000Z
End: 2026-10-14T06:30:00.000Z
Location: Drawing Office II

October 14, 2026 · 4:45 AM - 6:30 AM @ Drawing Office II, Peradeniya, Faculty of Engineering

Description

This session is proudly organized as part of the IEEE Day 2026 celebrations at the University of Peradeniya. Join us for a hands-on workshop on hardware acceleration focusing on Xilinx FPGA boards. Professional skills covered include: Fundamentals of RTL and digital logic design FPGA synthesis and hardware acceleration Functional verification and performance analysis FPGA deployment and toolchain implementation